Reduced surface field (resurf) double diffusion metal oxide substrate (DMOS) processes have been developed from conventional DMOS processes. In a DMOS device, an N-well is used to provide the drain of the device. In a reduced surface field DMOS device, the N-well is replaced by a shallow N-type region between the double diffusion well (D-well) and the drain contact diffusion.
Reduced surface field DMOS transistors offer the ability to achieve high OFF-state breakdown voltage (BVdss) as compared to conventional DMOS devices. As a result, these devices are very attractive for building cost effective intelligent power designs, as they are smaller than other devices used for power applications and they can therefore reduce the area needed for the power device.
The nature of reduced surface field DMOS devices requires careful alignment of masking levels. Normal process variations can cause misalignment or variations in alignment between the reduced surface field regions and the active regions, which can cause the OFF-state breakdown voltage to be lower than optimal. Known methods of fabricating reduced surface field regions in DMOS devices are not capable of controlling the alignment of the reduced surface field regions and the active regions to an acceptable level of accuracy.